author: Pafilis Ioannis - Aristotle University of Thessaloniki
Department of Electronics and Telecommunications
Department of Electronics and Telecommunications
In the present article, we will describe the function of a digital stopwatch, 0 – 99 sec. The function of the stopwatch, relies in the use of 4 integrated circuits, which in this case belong to National Semiconductor (http://www.national.com). It is obvious that other integrated circuits can be used to achieve the same result, however in this case we have used the following parts:
Α. 1 x CD4060BM (14 stage ripple carry binary counter)
B. 1 x CD4040BM (14 stage ripple carry binary counter)
C. 1 x MC14518B (BCD counter)
D. 2 x MC14511B (BCD to seven segment driver)
E. 2 x 7 segment LED displays
B. 1 x CD4040BM (14 stage ripple carry binary counter)
C. 1 x MC14518B (BCD counter)
D. 2 x MC14511B (BCD to seven segment driver)
E. 2 x 7 segment LED displays
The circuit that has been used is shown in picture 1. Through the experimental part we will explain each of the parts function, but in order to have a notion of the basic idea, let just say, that this circuit besides the 5V power supply, is fed with a pulse which comes from a crystal. The crystal’s pulse is devided properly in order to obtain the 1 Hz pulse which we need in order for the circuit to work properly, and display the seconds on the 7 segment displays, through a procedure which we will explain through the experimental part.
Description
We will begin the description of the digital circuit above. For our convenience we will devide the circuit to 2 parts: the generator, which produces the pulse of the desired frequency, and the part that does the actual counting.
Generator: The generator of the circuit comprises of the integrated circuits CD4040CM and CD4060CM. We use a crystal which oscillates at a frequency of 4,194,304MHz. It is obvious that this frequency is completely useless, as it is too big to be used as it is to our circuit. What we should is devide this frequency, in a way that in its final form, the pulse will have a frequency of 1Hz, which is the desirable frequency. Initially we use the integrated CD4060, which devides the imported frequency in its input, by forces of 2. As we can see on the integrated circuit the outputs are marked as Q4, Q5,… Qn. By importing a pulse in the CLK input of the 4060, with a frequency f Hz, we take out of output Qn, a signal which has a frequency equal to f/2n,. So, by exporting the signal out of Q14, knowing that the imported | signal has a frequency of 4,194,304Hz, we take a signal, which has a frequency of 256Hz. By importing this signal, to 4040 and by exporting the signal through Q8 we have finally taken an inverted signal, at the frequency of 1Hz. The fact that the signal is inverted, firstly doesn’t affect the proper function of our circuit and secondly is due to the inversion of the CLK input as we can see. This inversion just causes, the following circuit to be triggered with a logical “0”. By putting a LED on the same output, we have a visual of the counting, as in each positive pulse the diode polarizes positively, and a current passes through it. |
Counter: The signal of 1Hz, which we have taken from the generator, is imported to a BCD counter MC14518. This integrated circuit adds a logical “1” at each pulse, on its output.του. .The MC14518 is virtually divided into two segment. One counts the units of the seconds, while the other the decades. As we can see in picture 1, the generators pulse is imported to the part which counts the units. This is very logical, as we want in each secont the number of the display to be raised by 1. On the other hand, we want the first display to raise by 1, every 10 seconds. This is why, we ground the CLK input, and we use the signal of Q3 to the CKE input. | By using this means, we make sure that the first display will be triggered, only when we have a decreasing signal on Q3; that is, only when the signal drops from logical “1” to logical “0”. As we can see, the first display increments every 10 seconds, which means that after 9 on the second display (1001 on the output of the BCD counter) the first display must be set to zero, while the first must be set to +1. That is that from 1001 à 0000, and we have a descending pulse, as the last digit descends from logical “1” to logical “0” and triggers the BCD counter of the decades. When the decades display becomes 9 then the circuit goes to the next state, which is zero, and the counting begins once more. |
The integrated circuits MC14511 are BCD to 7 segment drivers. As its name clearly state, their sole purpose is to translate the BCD information of MC14518, to a code understandable by the 7 segment displays. The inputs (Lamp Test, Blanking) are used to test the LEDs of the display and pulse modulate the brightness of the display. In this case we these inputs to logical “0”, as we don’t need them. The LE input (Latch Enable) is used to keep the number of the displays while the pulse still runs. It is a HOLD function similar to the one of the modern stopwatches.
Source http://www.electronics-lab.com
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